Designing Low-Power Digital CMOS

Advances in VLSI fabrication in recent years have greatly increased the levels of integration making possible the implementation of highly complex algorithms such as Viterbi decoders, discrete cosine transforms etc. Smaller integrated circuit device and feature sizes have lead naturally to increased speeds. Expectations and demand have grown for the continuing development of both speed and functionality. In particular, the communications market is expanding rapidly with each provider seeking advantage in enhanced system performance. However, this and other markets also have a requirement for low power consumption since many products are portable and so battery operated. Unfortunately, the rapid development in VLSI has not been reflected in developments in battery technology and so the impetus is upon VLSI designer to adapt emerging technologies to provide complex high-throughput low-power systems.